A damascene method has been used as a wiring work technology of a semiconductor device. In such a damascene method, a recess is formed in a substrate. Subsequently, a barrier layer is formed on a wall surface that defines the recess. A seed layer is then formed on the barrier layer. Thereafter, copper is embedded in the recess. In general, a sputtering method is used to form the barrier layer and the seed layer, and a plating method is used to embed the copper.
In the wiring work, the barrier layer and the seed layer become locally thicker in a corner portion of the substrate, which defines an opening of the recess. That is to say, a base metal layer formed in the corner portion becomes thick. As a result, the width of an opening of the recess is narrowed. When copper is embedded in the recess with the opening narrowed, defective embedding of copper occurs in the recess. For example, voids are generated.
To suppress the generation of voids requires expanding the width of the opening of the recess narrowed by the base metal layer. In order to expand the width of the opening, performing a sputter etching on the base metal layer may be considered. In such a sputter etching, however, the wall surface that defines the recess, for example, the base metal layer formed on a bottom surface, as well as the base metal layer formed in the corner portion, may be also etched. As a result, the base metal layer becomes thinner, and, in some cases, the base metal layer may be removed.